The present disclosure relates to a multi-field set history buffer with a single write-back snoop tag that supports multi-field registers utilized by an information handling system.
Modern information handling systems typically implement out-of-order microprocessor designs that store register contents at “checkpoints” so the microprocessor can revert back to a register state prior to an interruption if required, such as during a branch instruction. For example, when a processor reaches a branch instruction, the processor selects a most likely path and begins to process instructions down the selected path. However, the processor stores register contents at the branch in case the selected path is the incorrect path and the processor needs to revert back to the register state prior to the mis-predicted path.
One location that a processor stores the register contents at checkpoints is in history buffers. Traditional history buffers allow a processor to store the entire contents of a particular register in a history buffer entry, such as storing the entire contents of a general purpose register (GPR) into a single history buffer entry. Each history buffer entry includes a single instruction tag (itag) field that stores an itag value from the GPR, which the processor utilizes to determine which history buffer content should be restored into specific registers if required.
Unlike GPRs, however, exception and status registers (e.g., FPSCR, XER, CR, etc.) consist of multiple fields, each having their own instruction tag (itag), which a processor may independently update. During data results write-back, a processor matches the write-back's corresponding write-back tag with the itags in the registers and history buffers to determine location(s) at which to store the corresponding result data.